LED Scrolling Display

Most outdoor LED displays and some indoor LED displays are built around individually-mounted LEDs. A cluster of red, green and blue diodes is driven together to form a full-colour display.

Fig. 1: Structure of an 8x8 LED dot-matrix display

Fig. 2: 5×7 array of LEDs

In a dot-matrix LED display, the LEDs are wired together in rows and columns to minimise the number of pins required to drive them. For example, an 8×8 matrix of LEDs, shown in Fig. 1, would need 64 I/O pins—one for each LED pixel. By wiring all anodes together in rows (R1 through R8) and cathodes in columns (C1 through C8), the required number of I/O pins is reduced to 16. Each LED is addressed by its row and column number. In Fig. 1, if R4 is pulled high and C3 is pulled low, the LED in the fourth row and third column will turn on. Alphabets and numerals can be displayed by fast scanning of either rows or columns. In this project, column scanning has been used.
Working of a dot-matrix display
Fig. 2 shows which LEDs in a 5×7 matrix of LEDs are to be turned on to display the English alphabet A. The seven rows and five columns of the array are controlled through a microcontroller.
If we want to display alphabet A, we will first select column C1 (which means C1 is pulled low in this case) and deselect other columns by blocking their ground paths (one way of doing that is by pulling C2 through C5 pins to logic high). Now, the first column is active, and you need to turn on the LEDs in rows R2 through R7 of this column, which can be done by applying forward-bias voltages to these rows.
 

Fig. 3: Power supply and controller circuit

Next, select column C2 (and deselect all other columns) and apply forward-bias voltages to resistors R1 and R5, and similarly for columns C3 and C4. Then, activate column C5 by pulling it down and deselect other columns, and apply forward-bias voltages to LEDs in rows R2 through R7.
By repeating these steps quickly (>100 times per second), and turning on the respective LEDs in each row of that column, the persistence of vision comes into play and we perceive the displayed image of the alphabet A as still.

You must have noticed that across each row one pin is sourcing the current for only one LED at a time, but a column pin may have to sink the currents from more than one LED. For example, column C1 should be able to sink the current from six LEDs while displaying alphabet A. A microcontroller has low sourcing as well as sinking capabilities. To obviate this limitation, external transistor arrays or buffers are used. In this project, pnp transistor BC558 (T1-T8) has been used for this purpose. In the circuit an 8×8 dot-matrix has been used.
Brief description of the ICs used
IC1 is a 7805, 5V regulator IC, which provides the 5V output voltage for driving the circuit around microcontroller IC2. AT89C52 (IC2) is a low-power, high-performance CMOS 8-bit microcontroller. It has 8k bytes of Flash ROM, 256 bytes of RAM, 32 I/O lines, three 16-bit timers/counters, a six-vector two-level interrupt, a full duplex serial port, an on-chip oscillator and on-clock circuitry.

Fig. 4: Display unit

CD4094 (IC3-IC5) is an 8-stage serial shift register, having a storage latch associated with each stage for stroking data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transition. Data in each shift register stage is transferred to the storage register when the strobe input is high. Data in the storage register appears at the outputs, whenever the Output-Enable signal is high. Two serial outputs are available for cascading a number of CD4094 devices. Data is available at the Q serial output terminals on positive clock edges to allow for high-speed operation in cascaded system. The same serial information, available at the Q terminals on the next negative clock edge, provides a means for cascading CD4094 devices when the clock rise time is slow.

ULN2803 (IC6–IC8) is an octal high-voltage, high-current Darlington transistor array. The eight npn Darlington connected transistors (T1-T8) are ideally suited for interfacing between low-logic-level digital circuitry and the higher current/voltage requirements of lamps and relays. The device features open-collector outputs and freewheeling clamp diodes for transient suppression. It is designed to be compatible with standard TTL families of Ics.

Circuit and working
The circuit diagram is divided here into two parts. The first part has a power supply and controller circuit as shown in Fig. 3. The display unit is in the second part as shown in Fig. 4.
The power supply circuit is built around a step-down transformer, bridge rectifier and 5V regulator. The configuration is conventional. The circuit provides regulated 5V for operation of the circuit.

Fig. 5: An actual-size PCB layout for the power supply and microcontroller unit

Fig. 6: Component layout of power supply and microcontroller unit

Microcontroller AT89C52 provides outputs to control the logic levels for the eight rows R0-R7 through port A (P0.0-P0.7). RNW1 is a network resistor, which acts as a pull-up resistor for port 0. An array of eight pnp BC558 transistors (T1-T8) working as current drivers takes care of the current required for LEDs of the dot-matrix; the microcontroller has low sourcing capabilities. The reset arrangement is made at pin 9 of the microcontroller with the help of capacitor C3, resistor R2 and switch S1.
 

Fig. 7: Track layout of the bottom layer of display unit

Fig. 8: Track layout of the top layer of display unit

The circuit for the display unit is shown in Fig. 4. It is built around three CD4094 cascaded 8-bit shift registers (IC3-IC5), three ULN2803 high-current Darlington transistor arrays (IC6-IC8) and three 8×8 dot-matrix displays (DIS1-DIS3). Clock and data pulses are generated by the microcontroller at ports P2.1 and P2.0, respectively. These are transferred to the display unit through connectors CON2 and CON4.

Fig. 9: Component-side track layouts of top as well as bottom layers of the display unit

Download PCB and Component Layout PDF: Click Here

Download Source Code: Click Here
Clock pulses are fed to pin 3 of all the three shift registers, while data pulses are fed to pin 2 of the first shift register, IC3. The output of the first shift register from pin 9 is fed to pin 2 of the second shift register, IC4. To complete the cascading, output of the second shift register from its pin 9 is fed to pin 2 of the third shift register, IC5.
Data from the shift registers is used for activation or deactivation of columns of the three dot-matrix displays (DIS1-DIS3) through IC6-IC8 ICs. For controlling the logic levels at rows R0-R7, data from port P0 is transferred from the microcontroller to the display unit through connectors CON1 and CON3, with a supply of 5V and common ground to display unit of these two connectors.

Software
The source program for the display of ‘EFY INDIA’ is written in Assembly language and compiled using Keil μVision4 compiler. The generated hex code is burnt into the microcontroller using a suitable programmer.
Construction and testing
An actual-size, single-layer PCB layout for the power supply and the microcontroller unit is shown in Fig. 5 and its component layout in Fig. 6. PCB for the display unit is a double-sided one. Track layout of its bottom layer is shown in Fig. 7 and of top layer in Fig. 8. Component and track layouts of the top layer as well as the bottom layer are shown in Fig. 9.
Assemble the circuits on the PCBs to save time and avoid assembly errors.